diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index b303fab..83c055a 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -111,6 +111,14 @@
 
 source "drivers/mtd/nand/Kconfig"
 
+config SYS_NAND_MAX_CHIPS
+	int "NAND max chips"
+	depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \
+		SPL_OMAP3_ID_NAND
+	default 1
+	help
+	  The maximum number of NAND chips per device to be supported.
+
 source "drivers/mtd/spi/Kconfig"
 
 source "drivers/mtd/ubi/Kconfig"
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 796041a..7da3983 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -423,13 +423,6 @@
 	    not available while configuring controller. So a static CONFIG_NAND_xx
 	    is needed to know the device's bus-width in advance.
 
-config SYS_NAND_MAX_CHIPS
-	int "NAND max chips"
-	default 1
-	depends on NAND_ARASAN
-	help
-	  The maximum number of NAND chips per device to be supported.
-
 if SPL
 
 config SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 65c1638..73858c5 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -95,7 +95,6 @@
 
 /* NAND configuration part */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_MAX_CHIPS	1
 #define CONFIG_SYS_NAND_BASE		0x0C000000
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 8c26c68..7545979 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -142,7 +142,6 @@
 /* NAND */
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_NAND_BASE		0x40000000
-#define CONFIG_SYS_NAND_MAX_CHIPS	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 /* APBH DMA is required for NAND support */
 #endif
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index ca5fac9..e084a9f 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -51,8 +51,6 @@
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
 
-#define CONFIG_SYS_NAND_MAX_CHIPS       1
-
 #undef CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_MAX_NAND_DEVICE      3
 #define CONFIG_SYS_NAND_BASE2           (0x18000000)    /* physical address */
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 5bd4f3b..5e2f377 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -129,7 +129,6 @@
  */
 #define CONFIG_SYS_NAND_BASE		0xE1000000
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_MAX_CHIPS	1
 #define CONFIG_NAND_FSL_ELBC
 #define NAND_CACHE_PAGES		64
 
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index cb8ccb3..2f8be2e 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -33,7 +33,6 @@
 /* When runtime detection fails this is the default */
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_MAX_CHIPS	1
 
 /*
  * Ethernet Driver configuration
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index b22e676..8d689d9 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -78,7 +78,6 @@
 /* nand driver parameters */
 #ifdef CONFIG_TARGET_PRESIDIO_ASIC
 	#define CONFIG_SYS_MAX_NAND_DEVICE      1
-	#define CONFIG_SYS_NAND_MAX_CHIPS       1
 	#define CONFIG_SYS_NAND_BASE            CONFIG_SYS_FLASH_BASE
 	#define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
 #endif
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index a6d7b8a..8b0dd49 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -94,7 +94,6 @@
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 
 #define DFU_ALT_INFO_MMC \
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index 7239eb1..fb86f1d 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -15,11 +15,6 @@
 #ifndef __LINUX_MTD_BBM_H
 #define __LINUX_MTD_BBM_H
 
-/* The maximum number of NAND chips in an array */
-#ifndef CONFIG_SYS_NAND_MAX_CHIPS
-#define CONFIG_SYS_NAND_MAX_CHIPS	1
-#endif
-
 /**
  * struct nand_bbt_descr - bad block table descriptor
  * @options:	options for this descriptor